Design and implementation of buffer memory management in industrial Internet of things

Chao WU; Chengqun WANG; Shenghong ZHU; Weiqiang XU; Yubo JIA

doi:10.11959/j.issn.2096-3750.2019.00088

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Design and implementation of buffer memory management in industrial Internet of things

Theory and Technology | 更新时间：2024-06-05

- Design and implementation of buffer memory management in industrial Internet of things
- Chinese Journal on Internet of Things Vol. 3, Issue 1, Pages: 60-64(2019)
- 作者机构：
  
  1. 浙江理工大学信息学院，浙江杭州 310000
  2. 新华三技术有限公司，浙江杭州 310000
- 作者简介：
- 基金信息：
- DOI：10.11959/j.issn.2096-3750.2019.00088
  CLC： TP393
- Published：30 March 2019，
  
  Published Online：2019-03，
- 稿件说明：
移动端阅览
CHAO WU, CHENGQUN WANG, SHENGHONG ZHU, et al. Design and implementation of buffer memory management in industrial Internet of things. [J]. Chinese journal on internet of things, 2019, 3(1): 60-64.
DOI：

CHAO WU, CHENGQUN WANG, SHENGHONG ZHU, et al. Design and implementation of buffer memory management in industrial Internet of things. [J]. Chinese journal on internet of things, 2019, 3(1): 60-64. DOI： 10.11959/j.issn.2096-3750.2019.00088.

摘要

针对工业物联网高速通信中出现流量堵塞如何高效存储的问题，引入了内存管理的方法。在研究同步动态随机存储器（SDRAM）存储原理的基础上，设计了一种基于现场可编程逻辑门阵列（FPGA）的SDRAM分区内存管理系统。采用FPGA作为主控制器，将SDRAM分成索引区和数据区两部分，为了方便内存管理，进一步将SDRAM数据区分成若干个1 kB大小相同的内存块，实现通过索引读写数据的目的。仿真结果表明，该内存管理系统配合FIFO（first input first output）的使用，可以有效解决在高速通信中出现流量堵塞后从SDRAM中读取多条数据帧造成数据错乱等不可靠问题，提高了通信系统的稳定性。

Abstract

Aiming at the problem of how to store traffic jam efficiently in high-speed communication of industrial Internet of things

the method of memory management was introduced.On the basis of researching the storage principle of SDRAM

a SDRAM partition memory management system based on field programmable gate array (FPGA) was designed.FPGA was used as the main controller

SDRAM was divided into two parts:index area and data area.In order to facilitate memory management

SDRAM data was further divided into memory blocks with the same size of 1 kB to achieve the purpose of reading and writing data through index.The simulation and experimental results show that the unreliable problems such as data disorder caused by reading multiple data frames from SDRAM after traffic congestion in high-speed communication can be solved effectively

and the stability of communication system can be improved by the memory management system combined with FIFO.

关键词

工业物联网现场可编程逻辑门阵列同步动态随机存储器内存管理

Keywords

industrial Internet of thingsfield programmable gate arraysynchronous dynamic random access memorymemory management

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